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Renesas Electronics /R7FA6T1AD /SPI0 /SPDR

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Interpret as SPDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SPDR

Description

SPI Data Register

Fields

SPDR

SPDR is the interface with the buffers that hold data for transmission and reception by the RSPI.When accessing in word (SPDCR.SPLW=1), access SPDR.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data